Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Ways to define the accuracy of a simulation model?

Status
Not open for further replies.

rgb83

Junior Member level 1
Joined
Apr 29, 2010
Messages
17
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,381
Hello members,

I have some doubts on how to define the requirements for certain analog simulation models.

Supposing you have to require a Boost DCDC converter simulation model which shall provide the Output voltage with a given maximum error.
How would you define the error and which is the value that can be considered acceptable?

Thanks in advance.
 

What volt range is needed by the device which you intend to power from the converter? That will give you an idea of acceptable error.

Suppose you are making an inverter. House voltage can wander by several volts. That is several percent.

Suppose you wish to power TTL IC's. They operate between 4.75 and 5.25 V. That is 5 percent above and below 5V.

It's a good idea to aim for tighter regulation than 5 percent, of course.

You must allow a boost converter sufficient time to reach desired output voltage at power-up. It can require many cycles.
And when you increase or decrease the load, it may again require many cycles to reach desired output voltage.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top