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Parameter array in Verilog

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mwn1

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Hi,
is it possible to create parameter array in verilog? for example, anything like the following

parameter[`TOTAL-1 : 0] PARAM_ARRAY = {1, 0, 0, 2}

if it is not possible, what could be the alternative solution?

Thanks in advance
 

It's easy in SystemVerilog

Code: 
parameter int PARAM_ARRAY[`TOTAL] = {1, 0, 0, 2};

If N has the value 3, PARAM_ARRAY[N] will have the value 2.

However in Verilog, you will have to pack all the elements into a single big vector.

Code: 
parameter  [0:(`TOTAL*32)-1] PARAM_ARRAY = {32'd1, 32'd0, 32'd0, 32'd2};

If N has the value 3, PARAM_ARRAY[N*32+:32] will have the value 2.
 
hi dave_59,
thanks for you reply.
if i understood correctly, you wanted to mean in the last line is that
Code: 
PARAM_ARRAY[N*32: (N+1)*32-1]
will have the value N-th number of the PARAM_ARRAY. so if N=3, then it will have 32'd2

please correct me if im wrong
 

You cannot have a variable expression for both the MSB and LSB of a range. The syntax I showed is called an indexed part-select. See 11.5.1 Vector bit-select and part-select addressing of the IEEE 1800-2012 LRM.
 
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    mwn1

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thanks mate :)
 

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