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[SOLVED] How can you find an ideal target insertion delay before performing CTS?

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iamcharlz

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How can I find an ideal "target insertion delay" based on my design to enter before performing CTS?
 

You cannot... you can just estimate. Your target insertion delay should be such that your skew is not very high and for that you will have to do some dummy runs.
However, thumb rule says skew should be as low as possible. So for a design with 20MHz (50ns clock period) 0.5ns skew means 1% which might be acceptable depending on how prone your design is to timing violations. but the same 0.5ns for 200MHz would mean 10% violation and that in any design is not acceptable.
 

Thanks for the reply... r09ty!! :)
 

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