vivekanilvivek
Newbie level 3
Hi,
I am trying to build the peripheral around Cortex-M0 IP core thorugh AHB-lite system. Right now I have to integrate Cortex-M0 with the DDR2 SRAM (1Gb) through AHB lite.
I find on internet which shows interfacing only through core generator (MIG). Is there a way I can use Xilinx core generator to interface through AHB lite system.
I am using Atlys Xilinx Spartran 6.
I also have some example SoC design which interface 128Mb SRAM to Cortex-M0 though AHB lite for Nexsys 3 board . But the Board I am using has DDR2 RAM.
Thanks
I am trying to build the peripheral around Cortex-M0 IP core thorugh AHB-lite system. Right now I have to integrate Cortex-M0 with the DDR2 SRAM (1Gb) through AHB lite.
I find on internet which shows interfacing only through core generator (MIG). Is there a way I can use Xilinx core generator to interface through AHB lite system.
I am using Atlys Xilinx Spartran 6.
I also have some example SoC design which interface 128Mb SRAM to Cortex-M0 though AHB lite for Nexsys 3 board . But the Board I am using has DDR2 RAM.
Thanks
