mediatek
Member level 1
EDIF ERROR ! Help !!
When use @ltera LPM_ROM and @ltera ROM INITIAL FILE to generate LPM_ROM verilog Ccde(With inital value file .HEX) then call synplify to produce .edf file to let altera compile to produce .sof file
it show
Error: Can't compile EDIF Input File due to syntax error parse error, expecting `'(''
trace the error find edf syntax as follow cannot be accepted by @ltera
lpm_rom_LPM_ROM_8_11_2048_REGISTERED_REGISTERED_F&:&/work&/CHINCK.hex_UNUSED_ACEX1K_1 (cellType GENERIC)
it seem that !ltera cannot understand F&:&/work&/CHINCK.hex...
PlS anyone master altera guy help me how to use synplify synthesis lpm_rom ( with hex) to produce .edf then can use @ltera compile!!
tks in advance !
Very Appreciated!!
When use @ltera LPM_ROM and @ltera ROM INITIAL FILE to generate LPM_ROM verilog Ccde(With inital value file .HEX) then call synplify to produce .edf file to let altera compile to produce .sof file
it show
Error: Can't compile EDIF Input File due to syntax error parse error, expecting `'(''
trace the error find edf syntax as follow cannot be accepted by @ltera
lpm_rom_LPM_ROM_8_11_2048_REGISTERED_REGISTERED_F&:&/work&/CHINCK.hex_UNUSED_ACEX1K_1 (cellType GENERIC)
it seem that !ltera cannot understand F&:&/work&/CHINCK.hex...
PlS anyone master altera guy help me how to use synplify synthesis lpm_rom ( with hex) to produce .edf then can use @ltera compile!!
tks in advance !
Very Appreciated!!