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What is for CLKIN_IBUFG_OUT?

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Hi
I have make DCM component from xilinx coregen like following

dcm dcm_inst
(
.CLKIN_IN( spclk ),
.RST_IN( 1'b0 ),
.CLKFX_OUT( clk_out_0 ),
.CLKIN_IBUFG_OUT( ),
.LOCKED_OUT( lock )
);

But i'm not sure What is this "CLKIN_IBUFG_OUT"
What is for ?
 

Usually there is a "datasheet" or some such button in coregen that opens up helpful documentation for precisely this occasion.

Or search for "Libraries Guide for HDL Designs" for your specific FPGA. Then read the part on DCM. That will definitely describe those signals.
 

Sorry i dont understand this conversation's point.

FuzzySNR said:
There is a nice discussion here, have a look:
http://forums.xilinx.com/t5/New-Use...ween-CLKIN-IBUFG-OUT-and-CLK0-OUT/td-p/310795
Click to expand...

- - - Updated - - -

Sorry i can't find CLKIN_IBUFG_OUT

mrflibble said:
Usually there is a "datasheet" or some such button in coregen that opens up helpful documentation for precisely this occasion.

Or search for "Libraries Guide for HDL Designs" for your specific FPGA. Then read the part on DCM. That will definitely describe those signals.
Click to expand...
 

CLKIN_IBUFG_OUT is simply a buffered form of CLKIN_IN.
 

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