TTL output to CMOS input...using a pull up resistor..how?

www.interfacebus.com/design_translation.html

We use a pull up resistor to ensure that the CMOS input will recognize the high output of TTL...can someone explain to me what happens when the TTL output is high with some circuit analysis? I read somewhere " the effect of a TTL output on external circuits is negligible when the pin is pulled high by an external resistor" ...and i'm kinda confused..sorry for asking newbie questions.

cmos pull up resistor

This discussion assumes 5 V Vcc.

TTL output levels must only drive 2.0 volts or greater for a logic high level. In addition, many TTL drivers source less current than they sink, meaning that while they may be rated for 4 mA drive for logic high, they might be rated at 12 mA for a logic low. As the output voltage increases, the drive current drops to where it may only drive 0.5 mA at 3.5 V.

The pull-up resistor sources additional current to the signal, helping the output driver to get to the 3.5 V CMOS logic high level. This helps meet the logic high CMOS requirement without hurting the logic low level as the TTL output can easily overcome the effects of the pull-up resistor.

In addition to ensuring that the TTL logic high output signal reaches CMOS logic high levels, the pull-up resistor will provide a faster rise time.

I hope this helps answer your question.

ttl output to cmos input

Here you can find more info on Level Translation:

http://www.interfacebus.com/Design_Translation.html