Leakage in Half Bridge SMPS transformer seriously reduces Vout..why

Hello,
The below Half Bridge SMPS simulation, has a transformer turns ratio of 1:0.616
Vin = 400V

If the transformer leakage is made zero (coupling factor = 1), then the output voltage = 67V

If the Half Bridge transformer coupling factor is made to a more realistic value of 0.99, then the output voltage is just 46V

(even though the duty cycle is the same as before).

Why does such a small value of leakage have such a big effect on the output voltage?

LTspice schematic and simulation attached of Half Bridge

" has a transformer turns ratio of 1:0.616 ", circuit shows 5m +1m9 ~ 1 : .4 Also you should be getting 400V p-p across the primary giving 240V p-p across secondary. where are all the volts going to?
Frank

remember the duty cycle affects the output voltage too.
Even so, the leakage still knocks down the output voltage more than I thought it would

I think the question can be briefly answered by calculating the reactive series impedance corresponding to the leakage inductance. I arrive at 6 ohms.

I made the leakage = 99.5uH {= 5E-3 * (1-0.99^2) = 99.5uH}
-then reactive impedance = 2.pi.fsw.Llk = 2*pi*100K*99.5E-6 = 62.5 Ohms.
Have I gone wrong somewhere?

I calculated secondary referred leakage.

Compare the secondary winding voltages between the cases of k=0.99 and k=1, and you'll see that not only is the amplitude less when k=0.99 but also the effective duty cycle is greatly decreased by about 1.37us. This is because the primary leakage prevents the current from ramping up to the primary-referred output current quickly.

I believe the "overall" leakage is 99.5uH, as calculated in #5 above, however, this is comprised of (99.5/2) uH in the primary and {(99.5/2) * (ns/np)^2} uH in the secondary.

That is, a 49.75uH leakage inductor in the primary , and a 19uH leakage inductor in the secondary.
I am not sure where the 6 Ohms of inductive reactance (2.pi.fsw.Llk) comes from?

I see what is meant by the primary (& secondary ) current ramping up and the effective duty cycle being somewhat less.

This appears to be the basis of the problem....the time to ramp up {dt = [L.di]/(Vin/2)} reduces the on time and thus reduces the "effective" duty cycle. Then when the current is ramping in the output inductor, it also oviously ramps up in the primary, and also in the leakage, and there is a voltage across the leakage of v=Ldi/dt.

...These two factors account for the enormous amount of "lost" volts. I don't know why I couldn't see it before, -and the tme old V=Ldi/dt euation works it all out.

I think we can conclude, that for offline half bridge converters (offline converters struggle to get k factor of trafo above 0.99 due to the isolation requirement in the trafo), the standard equation of (Vout = Vin/2 * N * D) is pretty much useless, do you agree?

..Incidentally, does any reader know why the entire input voltage (i.e. Vin/2) appears across the leakage inductor (and none across the primary) when the FET first turns on?

treez said:

..Incidentally, does any reader know why the entire input voltage (i.e. Vin/2) appears across the leakage inductor (and none across the primary) when the FET first turns on?

Click to expand...

As I said above, the primary current must reach the primary-referred choke current before any energy is actually transferred to the output. Until that happens, the catch diodes in the output rectifier will continue to conduct, which effectively shorts out the secondary, and thus the primary magnetizing inductance. Once the current has reached the choke current the catch diodes will stop conducting, allowing the transformer to deliver power to the output. This is natural behavior for the converter, and is another reason why leakage must be minimized. In this case you should just decrease the overall transformer inductance by an order of magnitude or so.

Thanks, I see what you mean Mtwieg,

you should just decrease the overall transformer inductance by an order of magnitude or so

Click to expand...

..yes, i'd like to, but then the magnetising current increases. The current trafo of LP=5mH & LS = 1.9mH gives a di_ON of about 110mA....This is roughly 10% of the actual di_ON of the primary referred secondary current, which is about nice.

Having too much magnetising current is going to mean it effectively has added slope compensation, which can be ok, but if the duty cycle is below 0.5, then that extra slope is not wanted, and it will certainly reduce the transient response. Not only that but the current sense resistor will have to be downsized, which in turn degrades the short circuit protection slightly.
Having said that, I see what you mean...reducing the leakage term is seeming like the better of the 2 evils.

(I've never read in any SMPS book that one should limit the primary inductance , so as to result in a lower leakage inductance, strange that this knowledge is not "out there".)

treez said:

Thanks, I see what you mean Mtwieg,

..yes, i'd like to, but then the magnetising current increases. The current trafo of LP=5mH & LS = 1.9mH gives a di_ON of about 110mA....This is roughly 10% of the actual di_ON of the primary referred secondary current, which is about nice.

Click to expand...

Well if you're fixated on the di ratios, then you could always decrease the choke inductor

Having too much magnetising current is going to mean it effectively has added slope compensation, which can be ok, but if the duty cycle is below 0.5, then that extra slope is not wanted, and it will certainly reduce the transient response.

Click to expand...

How so? The magnetizing current shouldn't cause any poles or zeroes to move...

(I've never read in any SMPS book that one should limit the primary inductance , so as to result in a lower leakage inductance, strange that this knowledge is not "out there".)

Click to expand...

It would probably occur to you when you went to design the actual transformer and discovered that it needs to be far larger or have way more turns than expected.

How so? The magnetizing current shouldn't cause any poles or zeroes to move...

Click to expand...

..that magnetising current ramp surely acts like slope compensation?....and the ramp of slope compensation certainly occurs in the small signal feedback loop equation.?
Basso's book shows the slope ramp in the feedback equations

treez said:

..that magnetising current ramp surely acts like slope compensation?....and the ramp of slope compensation certainly occurs in the small signal feedback loop equation.?
Basso's book shows the slope ramp in the feedback equations

Click to expand...

I know magnetizing current can act as slope compensation, but I've never seen a formulation of the CMC loop response which depends on slope compensation (except as for scaling or offset terms, which don't really matter).

equation 2A-5 (page 227) of the book "switch mode power supplies" by C.Basso shows how slope compensatory ramp effects the feedback loop transfer equation for a CMC Buck.....
As you know, a bridge is just a transformer isolated version of a buck.