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2-Phase Interleaved Bidirectional DC-DC Converter

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Ogbachi

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All,

I am working on my final year project: 2-Phase Interleaved Bidirectional DC-DC Converter with coupled inductor. I have two circuits diagrams as shown in the attachment. Please advise which of the cirduit diagrams will be most suitable for my design. My design specifications are:

Input voltage-48V

Output voltage-96V

Output current-100A

Efficiency-95%

Switch element-IRFB4710PBF

Gate driver-IR2101PBF

I am considering Option 1. Please, would want to find out from the circuit diagram how do i determine the following:

Duty cycle
switching frequency
inductor current
inductor ripple current
capacitor sizes
inductor size.

Many thanks in advance,View attachment Circuit diagrams.pdf
Ibrahim.
 

Option2 has no method to transfer energy from load to source and is not bidirectional.
 
Using coupled inductors seems wrong. Please reconsider.

You won't seriously plan to use IRFB4710 100V/75A MOSFETs.
The switch transistor must have a certain Vds margin and should have lower Rdson for acceptable on-state losses. You probably want stronger gate drivers than IR2101 respectively use a current booster.
 
Using coupled inductors seems wrong. Please reconsider.

You won't seriously plan to use IRFB4710 100V/75A MOSFETs.
The switch transistor must have a certain Vds margin and should have lower Rdson for acceptable on-state losses. You probably want stronger gate drivers than IR2101 respectively use a current booster.


FvM,

Many thanks on your quick response. Your comments well noted. I have another concern: From my calculations i observed input current will be around 210.53A with 95% efficiency and peak inductor current will be around 252.636A. I would want to ask using two parallel switches of each drain current 75A will be ok for the design. I am considering switch losses. Also, will two parallel switches do the job? I am using coupled inductor.

I am considering 20KHz as the switching frequency which i selected arbitrarily, how do i confirm if this will be ok for the design?

Thanks.
 

I would want to ask using two parallel switches of each drain current 75A will be ok for the design.
I believe that the on-state losses with peak Id of about 63A may be still unwanted high.

I am using coupled inductor.
How?

I am considering 20KHz as the switching frequency which i selected arbitrarily, how do i confirm if this will be ok for the design?
Depends on the actual switching speed achievable in your design and respective switching losses and the inductors must be designed for the switching frequency. 20 kHz sounds basically reasonable.
 
I'm also scratching my head about the use of a coupled inductor.

Based on the frequency you have chosen, You must first have to do your calculations to determine the minimum inductance value, to maintain continuous conduction mode...for the power level you require, you must use CCM to keep peak switch currents at a manageable level.

Find a core that can support that much energy LI^2. And that has the window area to wind the number of turns with a large enough copper cross-section to carry the full current.
And Now the fun begins. Even though you are using a relatively modest frequency, there will be skin effect issues if you use a thick copper wire. This means that the inductor will most likely have to be copper-foil wound. Since you have two isolated windings, you'll have to add insulation between the two independent foils, and you'll notice that even though the insulation appears to be thin, it starts adding up quickly and consuming the window area. You could find that the required number of turns simply won't fit into the core.

If you plan to use actual copper wire instead and use bi or trifilar strands for each winding, the situation becomes even worse.

Bottom line. Research first the feasibility that you'll be able to actually build the required inductor.
 
FvM,

Many thanks on your response. Comments well noted. I selected coupled inductor to reduce inductor ripple current. Please, can you assist me to look at the possibility of using two-phase interleaved switches considering the input current is greater than the Drain current of both switches? What effect will it be on the switches if inductor current is greater than the switch maximum drain current?

Thanks.





I believe that the on-state losses with peak Id of about 63A may be still unwanted high.


How?


Depends on the actual switching speed achievable in your design and respective switching losses and the inductors must be designed for the switching frequency. 20 kHz sounds basically reasonable.
 

Peak current allowance is a matter of SOA (Datasheet fig. 8), dynamical Rth (Datasheet fig. 11), heatsink and ambient temperature. Do you have any overcurrent protection for the transistors?

I presume that the minimum of total (conduction + switching) losses will be achieved with higher transistor area, e.g. four 75A transistors for each switch element.

I agree that coupled inductors can work for duty cycles around 0.5. Which values of main and leakage inductance did you assume?

20 kHz is inbetween distinct application ranges of laminated steel and ferrite inductor cores.
 
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