saq_kaleem
Junior Member level 1
Hi,
I wanted to evaluate heat/temperature distribution on a ceramic substrate, bearing some MW integrated circuits, structures, and DC lines. The temperature distribution due to DC and MW signals can be seen with a MW and thermal co-simulation and looks fine to me.
The DC and MW signals pass through an IC. For the electrical model, this IC is represented as measured s2p file. The approximate dimensions of the chip, cavity, on-chip DC power dissipation and thermal conductivities of different materials are known. However, for the thermal model, if someone can comment how to represent this chip on a ceramic substrate, so that I can model the dynamic thermal distribution across the module. I want to use the scaled E-field from electrical model so that the real thermal distribution could be simulated.
regards,
Saqib Kaleem
I wanted to evaluate heat/temperature distribution on a ceramic substrate, bearing some MW integrated circuits, structures, and DC lines. The temperature distribution due to DC and MW signals can be seen with a MW and thermal co-simulation and looks fine to me.
The DC and MW signals pass through an IC. For the electrical model, this IC is represented as measured s2p file. The approximate dimensions of the chip, cavity, on-chip DC power dissipation and thermal conductivities of different materials are known. However, for the thermal model, if someone can comment how to represent this chip on a ceramic substrate, so that I can model the dynamic thermal distribution across the module. I want to use the scaled E-field from electrical model so that the real thermal distribution could be simulated.
regards,
Saqib Kaleem