Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Standard CMOS technology - the workhorse of semiconductor industry - has been scaled to such dimensions (at present, ~20nm technology node in or near production, ~10nm technology node in development), that further scaling may be impossible due to fundamental physical limitations.
We are forced to think that if there is no further scaling in semiconductor industry, that that would be the end of the world.
So, if further scaling is impossible (this might take another 5-10-15 years), it is suggested that further progress (increase of speed, functionality, integration, etc.) in semiconductors can be enabled by radically new technologies, different from silicon CMOS - such as graphene, carbon nanotubes, tunnel transistors, A3B5 materials, single-electronics, (Josephson Junction and other superconducting devices, as mentioned by erikl), etc. etc. I think that "post-CMOS" is a general term describing all these new systems and devices.
In spite of enormous amount of money spent on research on these new material and device systems, there is no evidence than anything can come close to silicon CMOS in terms of integration, manufacturability, cost, etc.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
