ebrahimi.khoy
Member level 3
Hi,
I need to compute the post-layout power consumption in SoC Encounter, however, for creating power grid libraries it requires an ICECAPs technology file. I am using TSMC 65 nm general purpose standard cell library. Does any one have some experience in dynamic power analysis with SoC Encounter to help me in this issue?
Regards,
Mojtaba
I need to compute the post-layout power consumption in SoC Encounter, however, for creating power grid libraries it requires an ICECAPs technology file. I am using TSMC 65 nm general purpose standard cell library. Does any one have some experience in dynamic power analysis with SoC Encounter to help me in this issue?
Regards,
Mojtaba