About NIOSII and General Purpose CPU ?

I want to try NIOSII in my new embedded design. According to Altera's announcement, NIOSII can provide up to 200 DMIPS performance(in coming Stratix2), and we also know that there exist abundant hardware resources inside FPGA devices(Registers, High Speed Buses, IPs, etc.), which will make most dsp algorithms and data exchange operations much more easy to be implemented.
But what about the control sequences(TCP/IP for example)? General Purpose CPU (like Intel Pentium series) usually has much higher clock speed (although operations like MULT may consume up to 100 cycles). If both dsp algorithms and high level protocols will be implemented inside NIOSII, how can I evaluate it?

Does anyone here has related experience please?

Hello kilone,

It is not easy to compare a Nios II system with a Pentium CPU. First it is necessary to know that Nios II is only a soft-processor IP for using it in an FPGA design. Beside that IP you can use a lot of others IPs for your design. That could be more other Nios II or DSP algorithms, SDRAM controller, UARTs, etc. Of course a PC Chipset has a much higher clock and is calculating very fast. Normally nobody who is using a Pentium for his application will move to a FPGA.

There are other reasons for using a Soft-Processor (Altera Nios II, Xilinx MicroBlaze, …):
- reconfigurable hardware (very flexible)
- very fast design time (software and hardware)
- very fast algorithms (for example FFT) should be real be realized in real hardware and not a software for the Nios II
- e.g. MULT can be realized in hardware (also embedded multipliers) which needs one or some few clocks
- You can implement more than one Nios II in a FPGA (for example one for TCP/IP and some controlling stuff and another for calculating a slow FFT)
- all IPs (Nios II, DSP algorithms, …) are working parallel and not in a multitask system – that’s why these systems can reach a overall speeds which is impossible for standard CPUs


Bye,
cube007