Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

decoder design for CMOS sensor

Status
Not open for further replies.

el hou

Newbie level 4
Joined
May 8, 2013
Messages
5
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,311
Hi all,

when I searched for a decoder design using in CMOS sensor I found the schematic shown in the picture Sans titre1.png, and this description : "The decoder used here is a simple NAND gate followed by 3 inverters for driving the row in the array (pixels matrix)."
I don't understand why he used three inverters !! And is it similar to use one inverter ?
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top