Questions regarding LDMOS use and another question about "meaning of Short IO"

Questions regarding LDMOS use and another question about meaning of "Short IO"

Hi,
I have 2 unrelated questions I hope someone can help me with:

1. I've never use a LDMOS. Is it just like a standard MOS but with higher breackdown voltages?
In fact I've never seen its schematic symbol. Is it just like a 4 pin MOSFET (source, drain, gate and backgate)?
If I intend to use this in an LDO (for the PMOS pass transistor and for the OPAMP), what kind of problem can be expected?
Can we use LDMOS in a similar circuit topology as a normal MOS?
I know LDMOS can be used with high supply voltage, but how about a low supply voltage?
If an LDMOS is said to have "Vrated |drain 12V", I assume this means that it can work with a 12V supply voltage. My question is can it usually work with "standard" supply voltage, like 3.3V (in a 180nm process)?
How much is the typical threshold voltage of an LDMOS?

I intend to use it in an LDO which should work with a high input voltage but also usable with low input voltage (input voltage from aroudn 3V to as high as possible).


2. What is the definition of a "Short IO"?
This is from a list of IPs provided by a foundry.
The full phrases is: "RVT 1.8V and 1.8V/5V short IO" and "Short true 5V IO"
Can anyone tell me what do these mean? What is "RVT"? is it Regular Threshold Volgate?

Sorry, I have too many questions .
Thank you in advance .

Re: Questions regarding LDMOS use and another question about meaning of "Short IO"

alifalif said:

1a) ... LDMOS. Is it just like a standard MOS but with higher breackdown voltages?

Click to expand...

Yes, but (usually) also with longer Lmin, thicker gate oxide, larger Vth and smaller gm .

alifalif said:

1b) In fact I've never seen its schematic symbol. Is it just like a 4 pin MOSFET (source, drain, gate and backgate)?

Click to expand...

Yes.

alifalif said:

1c) If I intend to use this in an LDO (for the PMOS pass transistor and for the OPAMP), what kind of problem can be expected?

Click to expand...

See 1a)

alifalif said:

1d) Can we use LDMOS in a similar circuit topology as a normal MOS?

Click to expand...

Re. schematic, yes.

alifalif said:

1e) I know LDMOS can be used with high supply voltage, but how about a low supply voltage?
If an LDMOS is said to have "Vrated |drain 12V", I assume this means that it can work with a 12V supply voltage. My question is can it usually work with "standard" supply voltage, like 3.3V (in a 180nm process)?

Click to expand...

Yes. But larger area consumption than a standard MOS for comparable electrical values (re. current, gm).

alifalif said:

1f) How much is the typical threshold voltage of an LDMOS?

Click to expand...

Depends on gate oxide thickness. For a 5V gate oxide, e.g., Vth of a PLDMOS is between -0.6 and -1V .