Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

What does ADC 20MHz input frequency mean?

Status
Not open for further replies.
O

Osawa_Odessa

Banned
Joined
Dec 31, 2012
Messages
168
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,298
Activity points
0
Hi,
I have a stupid question. When an ADC is said that its input frequency is 20MHz, what does this mean?
Is this the center frequency?
ADC frequency.JPG
Also, for example, in a circuit has an ADC with 20MHz input frequency, can I use other ADCs that have higher input frequencies ins stead?
Thanks for help!
 

ADCs will be usually characterized by it's maximum conversion rate (or sampling frequency), not input frequency.
 
Then its sampling frequency is constant. As for the ADC above, it means that its maximum sampling frequency is 20MHz?
If so, I can use other ADCs that have higher sampling frequencies, right?
 

The actual sampling frequency of an ADC is defined by an external clock, the maximum sampling frequency is a device parameter. Most high speed ADCs can be used at sampling frequencies below the maximum value. In some cases, internal design details set a minimal sampling frequency. E.g. capacitive sampling circuits can't work at zero sampling frequency. A 20 MHz ADC might work down to 1 MHz, consult the data sheet.
 
I want to ask another question. For example, my input signal ranges from 0-20MHz, it means that I can't use ADC with sampling frequencies larger than 40MHz.
Is it really good to sample with very high sample frequency, 400MHz for example?

PS: Can you tell me the difference between sampling frequency and conversion rate?
 
Last edited:

40 MHz sampling frequency would be only feasible, if the input signal is exactly band limited to 0..20 MHz, which requires an unrealistic anti-alias filter with infinite small transition band. In practice, there's a finite transition band and the sampling frequency would be higher than 40 MHz. As a well-known example, CD audio uses 44.1 kHz sample rate to achieve 0.. 20 kHz bandwidth.

Increasing the sampling frequency considerably above the necessary value is usually involving poorer signal-to-noise ratio, more power consumption etc.
 
My problem is that how can I choose ADC sampling frequency. The input signal is limited to 0...20MHz. I know that the sampling frequency has to be at least 44MHz. But I have seen there are many ADCs with sampling 400MHz. I wonder if I can choose these high sampling frequencies for my application?
As you said it will increase SNR but also increase power consumption.
If ADC's output is transfered to microcontroller, then is there any problems if the sampling frequency is very high about 400MHz or more.

And about sampling frequency and conversion rate:
sampling frequency: Hz
conversion rate: sample/s
Then are they equivalent?
 

When you are taking about micro controller u need check the max handling capability of the device...

What is ur application?It seems your application is not for high speed and using 400MHz will be over design.Select the adc based on ur application and processor interface from adc...
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top