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How this preamp works?

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Osawa_Odessa

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Can anyone give me some ideas how the circuit work?
I want to understand how it works.
Pream.JPG
Thanks!
 

I'm not sure but I think the main purpose of this circuit is to achieve better linearity. total transconductance of this circuit is gm(v(in+)-v(in-)) - gm(v(ref+)-v(ref-)). you can have the same transconductance by applying v(in+),v(in-) to the first differential pair and v(ref+),v(ref-) to the second one. however in this case each differential pair will experience a larger voltage swing(and consequently a poorer linearity) compared to that of the pre-amp in the figure.
 
And also to add on to it, if the drain of the 2 current sources are shorted, then the linearity will be a bit improved too.
 

shorting the drain of the 2 current sources may result in smaller offset since in fact a single current source is used to bias the 2 diff. pair but would you please explain a bit more why shorting the drains of the 2 current sources improves linearity?
 

yes its for better linearity, e.g. in weak inversion when you have linearity in the very small rangers (less than 50mV), (your circuit is linear upto those amplitudes), by changing sizes of these input transistors you can get a higher range of linearity.
 

I'm not convinced that linearity is the reason: it is the first stage of a high-speed comparator!
Also, this topology would reduce the common mode rejection.

A main difference with respect to a simple differential stage is that this one allows to have a controlled offset by means of Vref+ and Vref-.
Maybe this is the reason?

Regards

Z
 

zorro said:
I'm not convinced that linearity is the reason: it is the first stage of a high-speed comparator!
Also, this topology would reduce the common mode rejection.

A main difference with respect to a simple differential stage is that this one allows to have a controlled offset by means of Vref+ and Vref-.
Maybe this is the reason?

Regards

Z
Click to expand...

how we can controll the offset by means of Vref+ and Vref-?
I think linearity can be important even in the first stage of a high-speed comparator. imagine that v(in+)-v(in-) and v(ref+)-v(ref-) is large but not in the same order then in the usual circuit the output current of the two differential pair will be Gm1*vin and Gm2*vref. note that there is no reason to have Gm1=Gm2(because these transconductances may be large signal transconductances which depend on the value of its corressponding input voltage, i.e vin and vref)
 

mahdi3999 said:
how we can controll the offset by means of Vref+ and Vref-?
Click to expand...
Assuming identical transistors, the equilibrium condition (Vout=0) is reached when (Vin+) - (Vin-) = (Vref+) - (Vref-) = Voffset .

Z
 

zorro said:
Assuming identical transistors, the equilibrium condition (Vout=0) is reached when (Vin+) - (Vin-) = (Vref+) - (Vref-) = Voffset .

Z
Click to expand...

if the transistors are identical then voffset is zero. on the other hand we cannot choose Vref+ and Vref- arbitrarily. ADC structure and requirements set their values.
 

This pre. amp. which is used in comp. circuits which are based on +ve feed back ...the higher the difference between the signal and the reference ..the faster your comp. will reach saturation
concerning the operation ..it is a very simple differential pair ...but the input is fully differential , and accordingly the reference shall be differential.
 

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