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[SOLVED] How to generate right _berr and _dtack signal for MC68000CP10

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jamespond

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How to generate _BERR and _DTACK signal for MC68K?
Please help!
 

Here is my schematic for _dtack:
_dtack.jpg
If reset button released CPU steps 8 cycle of clock and always stpos with bus error.
I tryed to analising:
cycle1: do nothing
cycle2: address is 0000000h ->74hc138 y0 is active low : rom selected.
cycle3: _as, _lds, _uds active
cycle4:
cycle5:
cycle6:
cycle7:
cycle8: _as, _lds, _uds released, _halt signal active ----->BUS ERROR

I checked the CPU in an old Amiga and works good. Cheched all chips and rom (contents): all works good:
 

The problem caused by short circuit in 27c64 chip. I checked double checked it with my eprom burner and always works because the test program is small and not exceed the 4kbyte intervals.
 

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