elliot_cai
Newbie level 4
Hello!
I get a Verilog netlist after synthesis and convert it Spice netlist by nettran, I want use this Spice netlist inputting Nanosim for simulation.
But some problems in the Spice netlist:
1. The Verilog netlist hasn't power and ground connections, so in the Spice netlist also missing the connections. What can I do add the connections during the synthesis?
2. In the Verilog netlist, the pin orders are not so crucial. But in Spice netlist, when it calls the sub cells, the pins orders should be uniform. Since my Spice netlist it converted from the Verilog netlist, the pin orders is the same with the Verilog netlist but different from the Spice sub cells I defined before. What can I do adjust the pin orders? Can it be mapped in the synthesis?
Thanks!
I get a Verilog netlist after synthesis and convert it Spice netlist by nettran, I want use this Spice netlist inputting Nanosim for simulation.
But some problems in the Spice netlist:
1. The Verilog netlist hasn't power and ground connections, so in the Spice netlist also missing the connections. What can I do add the connections during the synthesis?
2. In the Verilog netlist, the pin orders are not so crucial. But in Spice netlist, when it calls the sub cells, the pins orders should be uniform. Since my Spice netlist it converted from the Verilog netlist, the pin orders is the same with the Verilog netlist but different from the Spice sub cells I defined before. What can I do adjust the pin orders? Can it be mapped in the synthesis?
Thanks!