vlsi_vishal
Newbie level 6
hello,
i am designing and simulate high performance voltage controlled oscillator but when i am writing the netlist have problem to get the Wmin and Lmin in 45nm technolohy in Hspice please tell me how can i select the minimum gate length and minimum gate width in 45nm technology in Hspice.
i am designing and simulate high performance voltage controlled oscillator but when i am writing the netlist have problem to get the Wmin and Lmin in 45nm technolohy in Hspice please tell me how can i select the minimum gate length and minimum gate width in 45nm technology in Hspice.