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Help: How to deal with the IOs that are not used?

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honghongrong

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I am using Virtex II Pro to design a system.
But I only use a few IOs and there are still
many other IOs that are not used. How can I deal
with these unused IOs? Shall I connenet them
to the Ground ?
 

Yup, one way is to connect them to ground.
 

Feel free to leave them not connected, connected to 0V or to +V..really doesn't matter...
 

I think, if the all are i/p, directly connect to GND/VDD. But if not sure, add a resistor to pull each i/o down.
 

All unused inputs should be tied high or low, a resistor is not needed, all unused outputs can be left floating. This is a rule of thumb for all digital circuits.
 

btbass said:
All unused inputs should be tied high or low, a resistor is not needed, all unused outputs can be left floating. This is a rule of thumb for all digital circuits.

Not for all - most of modern ICs have internal weak pull-up or pull-down, otherwise it will be pain for PCB designer to place hundreds of resistors for unused pins.

honghongrong,
you DON'T need external pull-downs for usual I/O pins. Check this link: _www.xilinx.com/xlnx/xil_ans_display.jsp?getPagePath=8272
There are some requirements for unused RocketIO pins - check this link: _www.xilinx.com/xlnx/xil_ans_display.jsp?getPagePath=14747 .
Also, if your IC comes in BGA package, it is good idea to place solder pads on PCB for all pins, including unused, otherwise the solder will float around and can make shortcuts.

Ace-X.
 

Ace-X, your first link does not mention Virtex II Pro. The V2 data sheet says unused pins have internal pulldown resistors, but the V2P data sheed does not say that. Or it's hidden very well.

If it were my project, I'd leave the pins unconnected on the PC board, and configure them with internal pull-down resistors. They will float briefly during configuration time, but most applications won't care.
 

echo47 said:
Ace-X, your first link does not mention Virtex II Pro. The V2 data sheet says unused pins have internal pulldown resistors, but the V2P data sheed does not say that. Or it's hidden very well.

V2Pro is based on V2. Also, you can check its datasheet page 1:
Virtex-II Pro devices are built on the Virtex-II FPGA architecture.
Most FPGA features are identical to Virtex-II devices.
The only difference concerning our topic:
The open-drain output pin TDO does not have an internal pull-up resistor.

Ace-X.
 

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