Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Finding the gate capacitance of an Inverter

Status
Not open for further replies.

Prashanthanilm

Full Member level 5
Joined
Aug 24, 2012
Messages
302
Helped
36
Reputation
72
Reaction score
36
Trophy points
1,308
Activity points
2,950
Hi all,

Can you please help me to Find out the gate capacitance of an Inverter?

I am working with cadence tool,

Thank you
 

with the report_timing, you could also report the -capacitance seen and other info.
Have you access to ETS (Encounter Timing System) which could read a Encounter SOC database, and have more report capacitance capability.
or look inside the .lib file.
 
RCA,

Considering I do have any access any file.

If I want to find the gate cap through simulations, how can it be done.

The tool will give the detail of pMOS and nMOS gate cap, but what about the total Inverter cap at once.

Please help me to understand this in more detail.

Thank you
 

serioulsy you have access to the file through the .conf file then you could access to the liberty.
 

If I want to find the gate cap through simulations, how can it be done.

The tool will give the detail of pMOS and nMOS gate cap, but what about the total Inverter cap at once.

Please help me to understand this in more detail.

The idea here is to know how to find through simulation.

Can you brief me about .conf file? Its content and relation with .lib

Thank you
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top