fpganewb
Newbie level 2
I want to make a fsm on an altera FPGA which uses on-chip memory.
I want to take an input, get data from memory based on input, use that data in the next cycle.
What is a good way to write verilog code for this while keeping timing in mind?
I want to take an input, get data from memory based on input, use that data in the next cycle.
What is a good way to write verilog code for this while keeping timing in mind?