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Setting Initial Condition on Internal nodes in Verilog A

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aarthy_maya

aarthy_maya

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I have to write a behavioral model for device.
There is, say for example 3 external node(IO) and one Internal node. When i run the model with Spectre, there is a convergence error as the tool was not able to compute the DC operating point. So I am trying to set initial condition on the internal node. I did tried placing the assignment in @(initial_step), but it doesn't work. Can anyone help with some general Idea?

Thanks!
Aarthy
 

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