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negative gain in common gate based lna

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Hello,

I am desining a common gate lna. Just a common gate without any buffer. The CG transistor has inductor at source and drain. Also a resitor is present at drain. I am getting s11 less than 10 db from 2.5G-7GHz, S22 about -6db for the same frequency range, b1f<1, kf>1 but s21 is negative. I have checked the biasing and all dc points? can anyone help? can anyone suggest that to setup my dc points , i am using transient analysis to check vds, vgs, id. Is this method ok??

Please help. Thanks
 

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