I am designing the decimation filter for sigma delta ADC. The filter is multi-stage and the first stage is a Sinc filter.
The implementation of the Sinc filter as a cascade of integators and differentiators, the integators operate at high clock rate, the differentiators operate at low clock rate.
Because the integator is cascaded, the second and third integators will very easy to go unlimited, if the their input is always negative or positive.
The Sinc filter is so popular using for downsampling, who can help me to realize it.
Thanks for any reply!!
The comb filter is easy to implement.You need not to consider the overflow on it.
Just consider how long the bit length will not cause the aliasing effect of the signal.
You can see it in "Delta sigma data converter" edit by Norsworthy.
Hi,
Sinc filter can be inplemented without considering overflow, if you have reserved addition bit width for word length growth. Certaintly, The integrator can make a number overflow, but research papers state that the result is right though overflow occurs. Pelease refer to basic materials about cic filters.
Reguards,
Claint
Added after 5 minutes:
Hi,
multibit and single bit does not impact the choice of filter. Multibit may impact your implementation of the filter. You may choose longer word length to preserve the precision of the filter.
Good luck
Regards,
Claint
Added after 17 minutes:
Here is the basic material of CIC filter.
Good Luck
Claint
How to implement the digital sigma delta modulator for dac??
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