bharadwaj.cv
Junior Member level 3
These are the doubts I have.
In the technology manual they specify that the CMOS process has "Six to eight copper metal levels, including up to
seven 1x, 1 relaxed-pitch 2x and two 6x metal level(s)". what does 1x and 2x specify here and what is relaxed pitch?
It also says the CMOS process has "Planarized passivation and interlevel low-k dielectrics". what does this mean?
thanks a lot,
In the technology manual they specify that the CMOS process has "Six to eight copper metal levels, including up to
seven 1x, 1 relaxed-pitch 2x and two 6x metal level(s)". what does 1x and 2x specify here and what is relaxed pitch?
It also says the CMOS process has "Planarized passivation and interlevel low-k dielectrics". what does this mean?
thanks a lot,
