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do I need to use large transistors to decrease the offset ?

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luantan

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Dear all:
I have used auto-zero method to null out the comparator’s offset(first store the offset voltage on a capacitor, then subtract it from the signal), the problem is
when I design my comparator, do I need to use large transistors (big L,big W)to decrease the offset even more?
If needed, how large would it usually be？
 

I think so. big size can decrease the mismatch.if your speed is not fast,it can be 5 times of basic .
 

Re: do I need to use large transistors to decrease the offse

Even larger than 5x. On 0.35um I have used 40x40um (multi fingered of course) to get below 0.5%. But layout is critical on larger devices i.e. the use of dummy patterns around the critically matched transistors and careful consideration of what goes over them (i.e. nothing if possible).
 

Re: do I need to use large transistors to decrease the offse

Of course if you can make the WL larger the matching will be better. However there is always trade-off with speed, power, etc of the comparator. Since you have already used offset storage in comparator design, you should run a simulation to test how the effectiveness of the offset cancellation mechanism, and corresponding to scale the WL to just enough for you specs. Of course, WL larger is better, but is it neccessary?
 

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