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Can a memory controller support ECC if the SDRAM used has a width of x16?

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sps0987

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Can a memory controller support ECC if the SDRAM used has a width of x16?

- - - Updated - - -

And is it possible to use 5 of the x16 chips to create a 72 bit width data bus, and still use ECC? Thanks a lot!
 

Hi sps0987,
If you are still following this thread.
DRAM interface can accommodate 8-bit, 16-bit, 16-bit plus ECC, 32-bit, or 32-bit plus ECC configurations.

About your updated question, I dont know what you mean. Because if you use 5 of the x16 that makes it 80 bits data bus. Plus your ECC with take extra bits.
I am not sure what you mean when you say, " is it possible to use 5 of the x16 chips to create a 72 bit width data bus, and still use ECC?"
Hope this helps.
 

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