Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

About designing an op-amp circuit where Vout will be the root of input voltage.

Status
Not open for further replies.

JUBAYER

Junior Member level 1
Joined
Sep 15, 2012
Messages
16
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,283
Activity points
1,386
please some one tell me the logic of designing a simple op-amp circuit in pspice. where the output voltage will be the square root of input voltage
 

In Pspice, a square root circuit can be easily "designed" by using ABM (analog behaviour modelling).

For a real hardware circuit, you can refer to analog multipliers, see an example in the AD633 datasheet
https://www.analog.com/static/imported-files/data_sheets/AD633.pdf

Or use a suitable combination of log/antilog circuits. The basic concept (no squareroot circuit shown) is explained in this application note:
**broken link removed**
 
Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top