[SOLVED] Inverter gpdk180 Cadence ERROR NWELLterm NWVIA : No Stamped Connections

Hello,

I`m new, studying electronics and this beginning has been though.

I`ve tried to create a Inverted using gpdk180 technology, but the "NWELLterm NWVIA : No Stamped Connections" keeps popping up every time I make the layout for the PMOS.

I similar problem was occurring with the NMOS part. It showed up the "PSUB SUBVIA : No Stamped Connections." and I handled that with a M1_PIMP connection. The same solution (with M1_Nwell) has not happened for the PMOS in the INVERTER. Everytime I run the DRC it gives me that error and it highlights the PMOS i`ve created. I`ve tried to solve it in different ways, but it seems I dont quite understand what is the NWVIA that the NBurried requires to be connected with the M1.

Any1 have some thoughts?

I`ve put some pics so every1 can see what i`m trying to create.

Tnx,

Your M1_Nwell (contact to VDD) together with the NWVIA must be in the same NWELL/NBurried region as the PMOSFET, not separated. Simply extend the NWELL over the above NWELL contact!

erikl said:

Your M1_Nwell (contact to VDD) together with the NWVIA must be in the same NWELL/NBurried region as the PMOSFET, not separated. Simply extend the NWELL over the above NWELL contact!

Click to expand...

So simple! Thanks a lot!

I'd tryed it with a separated Nwell connected with the PMOS one, as seen in a site/tutorial elsewhere but it gave me a distance error.

Thanks again.