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output impedance measurement in cadence...?

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rsashwinkumar

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Hi all,

I was designing a current-cell for a current steering DAC, I used a differential switch topology with a single MOS current source, biased at 10uA. I have attached the schematic. When i tried estimating the output impedance, i got an impedance of 361 Mohm, which I think too high. The way i tested the output impedance was to inject a test source of 1 A AC magnitude and measured the voltage at that node. Is that okay or is there something else i am missing here...

Plz help me out..,.
 

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rsashwinkumar said:
... i got an impedance of 361 Mohm, which I think too high. The way i tested the output impedance was to inject a test source of 1 A AC magnitude and measured the voltage at that node. Is that okay or is there something else i am missing here...
Click to expand...

You got an AC voltage of 361MV ? It looks tremendously high, but I think the result should be ok. You could verify by plotting PM2's Id vs. Vds characteristic (in the very same circuit) and check its gradient at the appropriate Vds (-757mV).

BTW: In order to achieve reasonably reliable current ratios with current mirrors, you better keep equal lengths for the mirror pairs, and just vary their widths.
 

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