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import an array to vhd code

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Hello,I want to import an array (1 x n) to my vhdl code,every element of array is 5-bit.I know I should be use it in serial but I dont know how define input "std_logic or std_logic_vector(4 downto 0)?
 

by the following example u can create arrays

type ram_t is array (0 to 255) of std_logic_vector(7 downto 0);
signal ram : ram_t := (others => (others => '0'));
 

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