satyakumar
Full Member level 3
Neoschip Technologies Hyderabad is offering advanced training in VLSI design and verification covering
1) SystemVerilog based Verification , SoC system verification, Advanced Verification techniques using VMM (Verification Methodology Manual) OVM ( Open Verification Methodology), and UVM (Unified Verification Methodology) along Linux/Unix perl/tcl scripting concepts. Training course includes lab facility with industry standard Tools.
2) VLSI Front design using VHDL/Verilog, Advanced Digital design concepts, ASIC/FPGA design techniques and approach.
Contact:
Neoschip Technologies
Ph: 040-66567676
e-mail: vlsitraining.india@gmail.com
1) SystemVerilog based Verification , SoC system verification, Advanced Verification techniques using VMM (Verification Methodology Manual) OVM ( Open Verification Methodology), and UVM (Unified Verification Methodology) along Linux/Unix perl/tcl scripting concepts. Training course includes lab facility with industry standard Tools.
2) VLSI Front design using VHDL/Verilog, Advanced Digital design concepts, ASIC/FPGA design techniques and approach.
Contact:
Neoschip Technologies
Ph: 040-66567676
e-mail: vlsitraining.india@gmail.com
