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What is the reason for having the capacitor in this circuit?

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iVenky

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I saw a question. In a linear regulator what is the reason for having the capacitor between the output and the feedback point ?(i.e., resistor divider or middle of the two resistors). I know the reason for having the capacitor between the output of the op-amp and the output but I couldn't understand the reason for having this capacitor.

Thanks a lot.
 

You should add an image of the circuit
 

A capacitor across the first resistor of the divider reduces the loop gain for rising frequencies and, thus, maintains stability of the closed loop (and - at the same time - can improve the load transient response).
 

A capacitor across the first resistor of the divider reduces the loop gain for rising frequencies and, thus, maintains stability of the closed loop (and - at the same time - can improve the load transient response).

The way I read it, he's talking about a capacitor placed across the top resistor in the divider (a "feed-forward" capacitor). In this case, the loop gain increases at high frequency (the feedback division ratio increases to unity at high frequency). This generally compromises stability to some extent, but it improves transient response. This can often be a reasonable trade-off, especially since linear regulators are generally made to be unity gain stable.
 

A capacitor across the first resistor of the divider reduces the loop gain for rising frequencies and, thus, maintains stability of the closed loop (and - at the same time - can improve the load transient response).

ZekeR, you are right - I have expressed myself unclear. It is the inverse of the feedback factor that is reduced. This leads to an enhancement of the loop gain phase in a certain frequency region - thereby improving the stability margin (if the time constant is properly chosen).
 

If you say that it improves the loop gain at high frequencies, wouldn't that be a problem? At high frequencies the phase is usually greater than 180 and if the loop gain is more than unity then we are putting ourselves in trouble.

Thanks a lot.
 

Dear iVenky
Hi
The aim of that capacitor ( it is usually between 1 u and 10 u ) is this : it will be short circuit instead of ripple frequency ( i.e the input current of opamp will be negligible hence the capacitor won't have any considerable current thus it can be considered as a short circuit for ripples) . thus when you have ripple in your out put the ripple will be across the feedback input ( without dividing by those resistors ) . thus the feedback loop can improve it as fast as possible .
Best Wishes
Goldsmith
 

If you say that it improves the loop gain at high frequencies, wouldn't that be a problem?
Clearly not for the normal case of a unitiy gain stable regulator.

Otherwise, we have to refer to actual open loop gain characteristics and intended compensation schemes, in other words to a specific regulator device.
 

Hi iVenky,

here are some more detailed information:

The capacitor in parallel to the first of the divider resistors realizes a so called "feedworward compensation" (mentioned already by zekeR in post#4).
This compensation scheme acts together with the lag compensation implemented by the output capacitor (and its series resistance).
Thus - if the feedforward method is used in addition (which is not always the case) its time constant must be carefully matched to the specific circuit characteristics (as mentioned by FvM).
As a result, the loop phase - and with it the phase margin - can be enhanced considerably.
That means: The purpose of this capacitor is loop stability. The value of this capacitor depends on the voltage divider resistors and is typically in the pF range (not uF as mentioned by Goldsmith).
 

AS I recall the output to feedback point needs to a a fixed voltage. and feedback to ground is the actual noise or DC error feedback source.

Fixed regulators have the feedback point grounded hence do that already with fixed.

Ratiometric designs need to have that voltage drop maintained constant from pin 2 to 3 on 3 terminal regulators and at the low impedance over the operating frequency response range helps maintain this reference..

The impedance with respect to ground then becomes a voltage feedback since the feedback cap is in series with the output to ground capacitance, the output ripple is passed directly to the feedback while the DC gain is determined by the R Ratio.

Since adjustment inout current is small the equivalent input impedance is relatively high so CR high pass phase shift is fairly small.

This reduces noise amplification by 100% feedback, but is of course sensitive to ground spikes so low ESR copper ground feed is wise.

Output Cap to ground ESR is important on some LDO regulators if their drive current is lower raising driver ESR, so ESR on these regulators is often specified as 0.1Ω min to 1Ω max. to prevent overshoot stability issues near unity gain.

I believe the rule of thumb for overshoot stability is the ESR of the output cap should not be lower than the ESR of the regulator due to load regulation. ( ∂V/∂I ~ ESR of reg output)
 
Last edited:

Hi iVenky,

as you know - a good diagram can tell us more that 1000 words.
Here is the loop gain for a typical LDO (pnp path transistor).
Parameters:
Load RL=2k CL=100n (Rs=2 ohm)
Voltage divider: 100k/100k.
Feedforward cap: with/without 10pF

The improvement in phase margin is evident (upper phase function with 10 pF, of course).
 

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