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osc jitter and reference voltage psrr

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lhlbluesky

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how to simulate the osc jitter in hspice (eye diagram, what to do)? and how to measure the jitter using Oscilloscope?
besides, if the reference voltage of osc has a poor psrr, then can the osc jitter be larger? that is, is there some relationship between the reference voltage and jitter?

thanks.
 

can anyone help me, or give some related suggestions?

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can anyone help me, or give some related suggestions?
 

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