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ASSURA: LVS problem having 2 labels on the same net

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tstoll

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Hi -
following problem:

GND PAD.

Both, the input and the output of the GND PAD are shortened in the schematic with a analogLib 1 Ohm resistor.
In the layout I have no analogLib R available, so I have to shorten these two pins somehow.
Unfortunately this technology does not have metal resistors.

Any suggestion? This is the only missing point to get that LVS clean!!

Greetings, Tom
 

You can as "Run short locator" to ignore power buses I believe. I am not a layout guy, but I often use the tool to run RC extracted sims of my design. I normally specify GND VCC VP33 in the "Virtual Connect Net Names".

- - - Updated - - -

You can use "Run short locator" to ignore power buses I believe. I am not a layout guy, but I often use the tool to run RC extracted sims of my design. I normally specify GND VCC VP33 in the "Virtual Connect Net Names".
 

I used the lvsIgnore = true statement on an analogLib resistor in the schematic. This is working fine.

But I do not know, how I should proceed in the layout. There are now 2 pins on one net - that is P_GND and GND, which is correct.

I read a bit the Assura manual.. and there is an option to join two nets - but I did not find an option to join labels.

When using the lvsIgnore statement in the schematic - is there a correspondence for layout?

Thanks,
Tom
 

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