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problem with generation of rom lookup using ip core generator in xilinx

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samyuktharai

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I am working on vhdl code for Numerically Controlled Oscillator using Xilinx 12.1.When I use the IP core generator to create rom look up table with a depth of 32 values and 15 bit width I have no problems it gets generated. But when I need a depth of 8192 values and 15 bit width the ip core is unable to generate the lookup table ,despite waiting for 5 hours it keeps processing and does not go beyond HDL analysis.Please help
 

May be your device is out of resources? try with a larger device.
 

May be your device is out of resources? try with a larger device

I tried with virtex-6 and got the output.Previously I was using virtex-4.Thanks for the help.
 

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