What is a clock synthesizer ? Also something about sampling ADC

Dear all is the clock synthesizer same as the Clock divider.

What actually is the function of clock synthesizer.

I have to program a Kit with ADC embedded and I want to play around with different sampling frequencies for ADC,
Now is this clock synthesizer the thing for me to do so or what?

Also the only purpose of clock in the ADC is to provide the sampling only...?

a clock synthesizer typically generates a clock that is a rational multiple of a reference clock. In many cases, this will be something like 2x, 8x, 1/2, 1/8th etc... However, more advanced devices can generate non-power of two values, like 3x, 3/2, 7/100, etc... Very advanced devices, like the si570, can generate nearly any frequency you might want. The typical hardware synthesizer uses a PLL structure.

The ADC clock should typically be a fixed frequency, and low jitter. jitter is the variation in period. eg, a 100MHz clock might have a rising edge every 10ns on average, but sometimes the edge might occur 10.1 ns later, and other times 9.9 ns later. For high-speed ADC's, this variation in sample time can limit the resolution, especially when the input signal has a frequency higher than the sampling rate (eg, when the anti-aliasing filter is a bandpass filter).

Hi,

Can you pint to some DOCS/pdf/information for a clock synthesizer?
Since i will start working on physical design on this block.

Thanks in advance.

Regards,
Basu