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Adding an invertor in clock path of a module

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dll_fpga

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hi,
Im designing a particular module of a chip....i have divided my design into 2 halves...1st half is working w.rt CLK clock and the other half is working wrt CLK inverted.
But i heard that using invertors in clock path is not advisable?
Is that true...what are the demerits of tht
anyone please explain...the advantages and disadvantages
 

Not necessarily but it highly depends what you need. The extra inverter will yield a propagation delay with respect to original clock so the transition edges will not exactly line up. If you need matched timing then use higher clock input and divide output with flip flops.

Other potential degradation is noise performance and/or additional clock jitter.
 

one more advantage is there you hold check dependency for setup being overridden will not be there. You dont need to perform hold checks.
 

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