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combinational division by 3

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krishanu007

krishanu007

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Hi all,
I want a circuit which will combinationally divide a number by 3.(or in one cycle :idea:)
whats is given is that number will always be divisible by 3 only.:razz:
post any tutorial link or any helpful post..as I couldnt find any moderate one.
 

Hi yx.yang
any idea what it will synthesize ? I mean what algo will be used in compilers for synthesis.
yx.yang said:
reg [7:0] divider;
wire [6:0] div_result;

assign div_result = divider / 3;
Click to expand...


---------- Post added at 09:55 ---------- Previous post was at 09:43 ----------

Hi yadavvlsi,
I was reading this article & found it is a clock divider circuit,if I am not wrong.
I am sorry if I couldnt make it clear to everyone,I want a divider circuit for dividing a number by 3.as we do for divide by 2,right shift by 1.

yadavvlsi said:
Here it is:
http://www.crbond.com/papers/div3.pdf
Click to expand...
 

one half-way solution:
you would notice that
1/3 = 1/4 +1/16 + 1/64 + 1/256 + .. (to infinity)
So you could get an approx result by doing shift-by-2 many times and adding up.
- b

...and further refine by dividing the difference of above result*3 from original number by3 (using a look up table) and adding to above result (all if numbers involved are small 16-bit or so)

-b
 
Last edited:

krishanu007 said:
Hi yx.yang
any idea what it will synthesize ? I mean what algo will be used in compilers for synthesis.


---------- Post added at 09:55 ---------- Previous post was at 09:43 ----------
Click to expand...


For synplify and synopsys DC or Candence RTL compiler, the assign div_result = divider / 3 can be synthesised. While for xilinx XST tool, you can just instance the xilinx generated divider IP core (like memories)
 

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