ipunished
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Hi,
Im learning Verilog by example from Chu's book..
so have a few basic questions..
this code is for a simple counter:
so basically.. what is this "next- state logic" ?? how many states are there?
cant i just write the code in one flow? why do I have to care about next state?
also in the next state logic it says
always @ *
so this means that at any signal change do whatever is in this always block... right?
so wont the clock also come in this? but we also have a separate always block above for always @ posedge clock and reset to do something else..
so for posedge clock wont both always be executed??
or is that what we want?
Im confused =/
Thank you
edit: please ignore the syntax errors in the code.. its not copying right from the poor quality pdf i have of the book
Im learning Verilog by example from Chu's book..
so have a few basic questions..
this code is for a simple counter:
Code:
module univ-bin-counter
#(parameter N=8)
(
input wire clk, reset,
input wire syn-clr , load, en, up,
input wire [N-1:O] d,
output wire max-tick, min-tick,
output wire [N-1:O] q
);
//signal declaration
reg [N-1:O] r-reg, r-next;
// body
// register
always @(posedge clk, posedge reset)
if (reset)
r-reg <= 0; //
else
r-reg <= r-next;
// next-state logic
always @*
if (syn-clr)
r-next = 0;
else if (load)
r-next = d;
else if (en & up)
r-next = r-reg + 1;
else if (en & -up)
r-next = r-reg - 1;
else
r-next = r-reg;
// output logic
assign q = r-reg;
assign max-tick = (r-reg==2**N-1) ? 1'b1 : 1'b0;
assign min-tick = (r-reg==O) ? 1'b1 : 1'b0;
endmoduleso basically.. what is this "next- state logic" ?? how many states are there?
cant i just write the code in one flow? why do I have to care about next state?
also in the next state logic it says
always @ *
so this means that at any signal change do whatever is in this always block... right?
so wont the clock also come in this? but we also have a separate always block above for always @ posedge clock and reset to do something else..
so for posedge clock wont both always be executed??
or is that what we want?
Im confused =/
Thank you
edit: please ignore the syntax errors in the code.. its not copying right from the poor quality pdf i have of the book