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    need logic gate circuit for a timing diagram

    hi, i'd like to ask some help on how to implement the attached timing diagram into logic gate circuit. thanks a lot.

    •   Alt25th May 2012, 05:22

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    Re: need logic gate circuit for a timing diagram




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    Re: need logic gate circuit for a timing diagram

    Hi... The idea is very simple... We need to have a mod 5 counter...
    000
    001
    010
    011
    100
    000
    001
    010
    .
    .
    .
    .
    As you can see the middle bit has a period of 5 times the system clock... It is high for two clock cycles and low for three clock cycles. This is 'Y'.
    To get 'A', I have connected 'Y' and system clock to an AND gate.. When 'Y' is high...The output will be the same as system clock....(you get two cycles).
    To get 'B', I have connected 'Ycomplement' and system clock to another AND gate.. The output is 'B'... The output is same as system clock when the Y is low(you get three clock cycles)... And voila...



    •   Alt25th May 2012, 08:34

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    Re: need logic gate circuit for a timing diagram

    Develop a Truth tambe then, develop Boleen expression, is that simple!



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    Re: need logic gate circuit for a timing diagram

    Truth table????



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    Re: need logic gate circuit for a timing diagram

    It really depends on whether all those signals are outputs or some are inputs. Convention would make A and B the inputs while Y would be an output. If that is the case a simple SR flip-flop is all you need. A rising edge on input A makes Y go high and a rising edge on input B makes it go low.

    Brian.
    PLEASE - no friends requests or private emails, I simply don't have time to reply to them all.
    It's better to share your questions and answers on Edaboard so we can all benefit from each others experiences.


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    Re: need logic gate circuit for a timing diagram

    thanks all for the reply. what i exactly need is the one described by betwixt. Input A rising edge will make Y go high & input B rising edge will make Y go low.



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