Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Signal Source to track and hold circuit consisting of a series switch and cap

Status
Not open for further replies.

Swordsman9

Newbie level 3
Joined
Jun 1, 2011
Messages
4
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,326
hi fellows, i am new to analog ic design and i need your advice on choosing the right signal source.

i am designing a track and hold circuit for +-0.1V, 200MHz input sampled at 1GHz. the track and hold circuit is not preceded by any buffer, although in some papers input buffers are used to drive the capacitor. so my first question is: is the input buffer really necessary to drive the cap? the AC current wouldn't be very large-around 50uA with a 0.5pF cap and small signal swing: icap=2pi*200M*0.1*0.5p.

i use cadence spectreRF to do the schematic simulation.
if i use ideal voltage source from AnalogLib to feed a sin signal directly to the input of the track and hold circuit, which would be the source/drain of the MOS switch, the transient response and the hamonic distortion at the output are acceptable.

but if i insert a 50Ohm resistor in series with the voltage source(or i directly use a port), spikes will show at the input of the circuit,and the transient and distortion will become worse. the output waveform hardly tracks the input signal during the tracking mode.

So my second question is: what is the right signal source to the input? is using the ideal signal source of any practical importance? should i consider of using AC coupling, a transformer? i really wish to avoid ac coupling, because this circuit should be wide band and i dont know how to set the parameters for a transformer.

thanks and regards,
swordsman
 

What circuits are you using to built a 1GHz track and hold?

it is a very basic one: a series switch + a cap. the switch is a 80um/60nm NMOS and the cap is 15umx15um 524fF MIM cap.
th.png

from the papers i read, some of the track and hold circuits are buffered by a unity gain input buffer, while others are not shown to be buffered, but we may assume they are driven by some off-chip buffers or the signal source.

if i directly couple an ideal sine signal source to the Vin, Vin would always be the ideal sine wave (with no spikes), and the resitance of the RC filter would be the on-resistance of the switch (Ronswitch), whill gives a wide bandwidth.
if i use an input buffer with some output resistance or a signal source with any source resistance, say 50Ohm, the total resistance of the RC filter would be the series sum of 50Ohm source resistance+Ronswitch, which will result in a low bandwidth. besides, spikes will show in the Vin waveform due to switching transients.
(or perhaps, i should use a port with a 50Ohm termination, and connect the track and hold circuit in parallel with the termination?)

when it comes to GHz range, Ronswitch is comparable to 50Ohm source resistance. it seems that the bandwidth of the track and hold circuit is limited by the source resistance rather than the Ronswitch. So it really makes a difference if an ideal signal source or any other more realistic sources are used. Say when i come across those papers who claim their design has 5GHz switching rate and 10GHz bandwidth, i will wonder if this is the simulation or test result from some ideal signal source. Now i am trying to write a paper, so what signal source should i use to get the simulation result?

Sorry for the number of words. and Thanks a lot even if u just take ur time to read a bit: )
 

I tend to assume that most analog IC designers are working with real devices and real circuits, including real signal sources. In the GHz analog signal processing domain, 50 ohm signal source impedance isn't bad as first guess, at least it's hard to achieve zero ohm.

50 ohm * 0.5 pF would still mean 6 GHz analog bandwidth. Fast sampling ADC are often using input capacitors to reduce the dynamic source impedance during sampling. They also mostly expose differential inputs, to improve linearity, ged rid of common mode noise and cancel switching transients.
 
Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top