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Power Consumption Measurement

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barjaktar

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Hello.

I am interested in power consumption of two circuits:

- NAND and


- AND functions.


For the first one (NAND) I measured power consumption by simulating the circuit for 100 cycles and then found avg(abs(i(Vdd))). This average current I multiplied with Vdd and divided the product by 100 to get power consumption per cycle. Basicly, this integral of absolute current over the given time is mean value of current used during 100 cycles. I thought it is obvious to take into account only the current of Vdd.

But, when it comes to the secon circuit, AND - I am not sure what to consider power consumption. Since there is no Vdd, am I to calculate the power drained from Va and Vb? But these voltage points (Va and Vb) are probably outputs of the same kind of circuit from the previous stage, so It confuses me. If it is the case, that power consumption of this circuit is avg(abs(Va + Vb)), should I take this into account in the first circuit, NAND? Should it be overthere avg(abs(Vdd + Va + Vb))?

Or am I totally wrong?

Thank you.
 

In the second circuit the only power dissipated will be due to charging and discharging of the gate capacitances. The power dissipated by one gate is CV²f where C is the gate capacitance, V is the gate switching voltage, and f is the switching frequency.
 

Thank you, crutschow.

I understand what you are saying, I've seen this equation before. But, I am interested in simulating this circuit and measuring power it consumes. How do you propose to do this? In the first circuit (NAND, one with CMOS inverter) I did it by measuring the current of the supply - I figured: all that is consumed must go through the supply. Is this correct assumption, or am I wrong? Also, all that is consumed must go through ground, so where to put ground in the second circuit (AND)? For example, to connect a capacitive load of 1pF and than to measure current that goes through it? I think that the dissipated power we are talking about (C*V*V*f) would taken into account here.
 

Assuming the model includes the gate capacitance, then you can measure the average AC current through each gate and multiple by the gate switching voltage. If you measure just DC power there will be essentially none.
 

Just to be sure, you are saying that total current consumed is:

avg( abs( Ig1 ) + abs( Ig2 ) + abs( Ig3 ) + abs( Ig4 ) )

(since there are four gates)?

Do you think that this is included in avg(abs(Idd)) for the first circuit, or do I need to simulate the first one again and measure this same trace?
 

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