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someone help to design VHDL code for 4x4 bits multiplier using MAX-PLUS II

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hudachan

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Hi,
Does anyone know how to write a 4x4 multiplier in vhdl? I would like to implement the code on a MAX-PLUS II (ALTERA). Any help would be appreciated. Thank you.
 

for a start - max plus 2 is very very old. You should be using a newer version of Quartus. THe VHDL compiler in Max plus 2 is pretty poor.
 

Something like this...? I haven't used max-plus II, but it should interpret it correctly, I think.
Code:
process (<clock>) 
begin 
   if <clock>='1' and <clock>'event then
      <output> <= <input1> * <input2>; 
   end if;
end process;
 

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