Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

FPGA Implementation of Pipelined 2D-DCT and Quantization Architecture for JPEG Image

Status
Not open for further replies.

bdeepak2191

Newbie level 1
Joined
May 5, 2012
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,287
hi friends. i am doing my final year project titled "FPGA Implementation of Pipelined 2D-DCT and Quantization Architecture for JPEG Image Compression". I have completed the coding in verilog. I need help from you for preparing my project report. I am not able to find enough materials on internet. can any one who has done a similar project mail me some helpful materials or the report of the project. This will help me a lot. my email id is bdeepak2191@gmail.com. thanks in advance.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top