bdeepak2191
Newbie level 1
hi friends. i am doing my final year project titled "FPGA Implementation of Pipelined 2D-DCT and Quantization Architecture for JPEG Image Compression". I have completed the coding in verilog. I need help from you for preparing my project report. I am not able to find enough materials on internet. can any one who has done a similar project mail me some helpful materials or the report of the project. This will help me a lot. my email id is bdeepak2191@gmail.com. thanks in advance.