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How to clear the characters from the display

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michalisce

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Hello,
I am using Nexys 2 board and VHDL language, I've already designed the vga controller 640x480, the PS2 interface for the keyboard,i am using a RAM block with 12-bit address and 8-bit of data
and a font rom. I know that RAM does not support reset, i have a reset btn that resets the counters for the lines that i want to write the keyboard's characters. The problem is that by pressing the reset btn along with the counters i need to clear the previous characters from the display.

if i'am correct i need to send to the specific ram addresses the character 'space'.

...
Code VHDL - [expand]
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ram_addr_2 <= (pixel_y(9 downto 4)) & (pixel_x(8 downto 3)); -- the address that goes to the ram block
                    
rom_addr_out <= char_addr & row_addr; -- the font's address

...

any ideas how to clear the line of characters by pressing the bnt?
thanx
 
Last edited by a moderator:

You will need to make the reset button action initialise the RAM to all zeros, or all spaces, or whatever. This might involve a state machine (or some extra states in your existing state machine) that counts through each RAM address and writes to it.
 
thank you for the replay,

I use a counter controller where i have 2 counters one each line. It starts and by pressing the enter key the counter changes to the 2nd line. i don't use state machine for the counters.

also i have the graphics module where all the garphics take place:

if i use a process :

Code VHDL - [expand]
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process(counter_value,reset_btn,char_addr,row_addr)
   begin
      if counter_value = unsigned'("001010001000") then  --the counter is at line 10, position 8
           if reset_btn = '1' then

---ADVISE---
or this has to work along with the clk to do one at a time???

can you pls provide an example because I am really confused with this?

thanx
 
Last edited by a moderator:

How are you writing to the RAM at the moment? You could adapt that process to act when reset is pressed, rather than just when a PS/2 keyboard key is pressed, or whatever.

Remember that there's no general way to do this - anything we suggest without seeing your entire code base will probably be confusing. You really just want to add a new action that responds to the reset and proceeds to write spaces to the entire RAM, before returning to the normal behaviour.
 

thank you again,

this is the RAM counter controller state machine, I've manage to include backspace operation, it works. How can I modify this to match to what i need?

Code VHDL - [expand]
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entity COUNT_RAM_CNTR is
    port ( clk : in std_logic;
             reset : in std_logic;
             kb_backspace : in std_logic;
             kb_data_ready : in std_logic;
             kb_ack : out std_logic;
             counter_inc : out std_logic;
             counter_dec : out std_logic;
             ram_wr_en : out std_logic
            );
end COUNT_RAM_CNTR;
 
architecture arch of COUNT_RAM_CNTR is
 
type state_type is (idle,kb_save,kb_clear,kb_clear2);
 
signal state_reg : state_type;
signal state_next : state_type;
 
begin
 
    process(clk,reset)
        begin
            if reset = '1' then
                state_reg <= idle;
            elsif (clk'event and clk = '1') then
                state_reg <= state_next;
            end if;
    end process;
    
    process(state_reg,kb_data_ready,kb_backspace)
        begin
            state_next <= state_reg;
            
            case state_reg is 
                
                when idle =>
                    if kb_data_ready = '1' then
                        if kb_backspace = '1' then
                            state_next <= kb_clear;
                        else
                            state_next <= kb_save;
                        end if;
                    end if;
                    
                when kb_clear =>
                    state_next <= kb_clear2;
                
                when kb_clear2 => 
                    state_next <= idle;
                
                when kb_save =>
                    state_next <= idle;
                
                when others =>
                
            end case;
    end process;
    
    -- output
    process(state_reg,kb_data_ready)
        begin
            kb_ack <= '0';
            counter_inc <= '0';
            counter_dec <= '0';
            ram_wr_en <= '0';
            
            case state_reg is
            
                when idle =>
                
                when kb_save =>
                    kb_ack <= '1';
                    counter_inc <= '1';
                    ram_wr_en <= '1';
                    
                when kb_clear =>            
                    counter_dec <= '1'; 
                    
                when kb_clear2 => 
                    kb_ack <= '1';
                    ram_wr_en <= '1';
                
                when others =>
            end case;
    end process;
end arch;


---------- Post added at 13:44 ---------- Previous post was at 12:36 ----------

thank you joelby for your help!

I solved it and it works, a minor addition to the state machine and some changes to the counters and thats it!
 

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