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Buffer tree synthesis

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pavi622

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How to create buffer tree & synthesis it using SOC -encounter.
Should it be included within the CTS file for synthesis or else should be synthesised separetly?
How to go about it?
 

For clock, just let the encounter do it using these commands:
Code: 
createClockTreeSpec -output clk.spec
clockDesign -specFile clk.spec
ckSynthesis

For reset if you want to buffer it, make a copy of the clock spec file and change the clock name to the reset name. Then use these commands:
Code: 
clockDesign -specFile rst.spec
ckSynthesis
 

Thanx,
But can any of the signal net be buffered similar to clock?
If do so are we restricting the tool in its optimization?
 

But can any of the signal net be buffered similar to clock?
Click to expand...

I am not sure but I think the tool will do optimization (buffering, etc.) for signals other than clock/reset. I think that other signals will have far less fanout than clock/synchronous reset, so the tool can do optimization without the need of special buffer tree structure.
 

Yes, you can do buffer tree synthesis for signal nets using bufferTreeSynthesis command.
bufferTreeSynthesis -nets net_name -bufList {} -maxFanout 24
For more detail check command reference.
 

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