heng1991
Newbie level 1
hey guy,pls help me....nid helps here.....gotta hv exam soon, bt face a prob for the mealy n moore....hope u guy cn help me solve the question as shown below...
Specification
An idle system is activated when an input X is given. Then an output Z is produced after two clock cycles later. Next, the system will be back to the idle state, waiting for the next triggering input X.
Let's the input/output relationship be
X: 001001110
Z: 000010010
so, hw many states shud i hv if i design it in moore?? thn hw many states will i gt if i design it in mealy??
can the number of states for both mealy n moore is nt the same??:?::?::?:
Specification
An idle system is activated when an input X is given. Then an output Z is produced after two clock cycles later. Next, the system will be back to the idle state, waiting for the next triggering input X.
Let's the input/output relationship be
X: 001001110
Z: 000010010
so, hw many states shud i hv if i design it in moore?? thn hw many states will i gt if i design it in mealy??
can the number of states for both mealy n moore is nt the same??:?::?::?: